/*
*  This is the header file for the AT-DIO-32HS RLP examples.
*  The header contains external function declarations and
*  the addresses of the DAQ-DIO and board registers.
*/

/*
*  Declare the external function prototypes.
*/

void 	     	Board_Write8(unsigned, unsigned);
unsigned         Board_Read8(unsigned);
void 	 		Board_Write16(unsigned,unsigned);
unsigned      	Board_Read16(unsigned);
void 	 		Board_Write32(unsigned, unsigned long);
unsigned long    Board_Read32(unsigned);
void 	        DAQ_DIO_Windowed_Mode_Write8(unsigned,unsigned);
unsigned         DAQ_DIO_Windowed_Mode_Read8(unsigned);
void 	        DAQ_DIO_Windowed_Mode_Write16(unsigned, unsigned);
unsigned         DAQ_DIO_Windowed_Mode_Read16(unsigned);
void 	        DAQ_DIO_Windowed_Mode_Write32(unsigned,unsigned long);
unsigned  long   DAQ_DIO_Windowed_Mode_Read32(unsigned);
int    Setup_PNP_Board(void);


/*
*  Define the register addresses.
*/

#define			WINDOW_DATA_0						0          /*address*/
#define			WINDOW_DATA_1                       1          /*address*/
#define			WINDOW_DATA_2                       2           /*address*/
#define			WINDOW_DATA_3                       3			/*address*/
#define			WINDOW_ADDRESS                      4
#define         MASTER_DMA_AND_INTERRUPT_CONTROL    5
#define         GROUP1_FIRST_CLEAR                  6         /*address*/
#define         GROUP2_FIRST_CLEAR                  7

#define         GROUP1_FIRST_FIFO                   8
#define         GROUP1_SECOND_FIFO                  9  
#define         GROUP1_THIRD_FIFO                   10  
#define         GROUP1_FOURTH_FIFO                  11  
#define         GROUP2_FIRST_FIFO                   12  
#define         GROUP2_SECOND_FIFO                  13  
#define         GROUP2_THIRD_FIFO                   14  
#define         GROUP2_FOURTH_FIFO                  15  

#define         FIFO_A                              16 
#define         FIFO_B                              17
#define         FIFO_C                              18
#define         FIFO_D                              19 

#define         GROUP1_TRANSFER_COUNT_0             20
#define         GROUP1_TRANSFER_COUNT_1             21
#define         GROUP1_TRANSFER_COUNT_2             22
#define         GROUP1_TRANSFER_COUNT_3             23 
#define         GROUP2_TRANSFER_COUNT_0             24 
#define         GROUP2_TRANSFER_COUNT_1             25 
#define         GROUP2_TRANSFER_COUNT_2             26
#define         GROUP2_TRANSFER_COUNT_3             27 

#define			PORTA                               28			/*address*/
#define			PORTB                               29          /*address*/
#define			PORTC                               30          /*address*/
#define			PORTD                               31          /*address*/
#define			PORTA_DIRECTION                     32            /*address*/
#define			PORTB_DIRECTION                     33          /*address*/
#define			PORTC_DIRECTION                     34        /*address*/
#define			PORTD_DIRECTION                     35          /*address*/
#define			PORTA_MASK                          36           /*address*/
#define			PORTB_MASK                          37           /*address*/
#define			PORTC_MASK                          38          /*address*/
#define			PORTD_MASK                          39           /*address*/
#define			PORTA_POLARITY                      40           /*address*/
#define			PORTB_POLARITY                      41         /*address*/
#define			PORTC_POLARITY                      42         /*address*/
#define			PORTD_POLARITY                      43         /*address*/
#define			GROUP_SYNCHRONIZATION               44         /*address*/
#define			MONITOR_AND_MASTER_CLOCK            45		/*address*/
#define			GROUP1_SECOND_CLEAR                 46			/*address*/
#define			GROUP2_SECOND_CLEAR                 47			/*address*/
#define			PORTA_PATTERN                       48			/*address*/
#define			PORTB_PATTERN                       49				/*address*/
#define			PORTC_PATTERN                       50				/*address*/
#define			PORTD_PATTERN                       51				/*address*/

#define         DATA_PATH_1                         64
#define         PROTOCOL_REGISTER1_1                65
#define         PROTOCOL_REGISTER2_1                66
#define         PROTOCOL_REGISTER3_1                67
#define         CLOCK_SPEED_LSB_1                   68
#define         CLOCK_SPEED_MSB_1                   69
#define         PROTOCOL_REGISTER4_1                70
#define         PROTOCOL_REGISTER5_1                71
#define         FIFO_CONTROL_1                      72
#define         PROTOCOL_REGISTER6_1                73
#define         PROTOCOL_REGISTER7_1                74
#define         INTERRUPT_CONTROL_1                 75
#define         DMA_LINE_CONTROL_1                  76
#define 		TRANSFER_SIZE_CONTROL_1             77
#define         CONDITION_DELAY_1                   78
#define         DAQ_OPTIONS_1           		    79
#define         PATTERN_DETECTION_1                 81
#define         PROTOCOL_REGISTER9_1                82
#define         PROTOCOL_REGISTER10_1               83
#define         PROTOCOL_REGISTER11_1               84
#define         PROTOCOL_REGISTER12_1               85
#define         PROTOCOL_REGISTER13_1               86 
#define         PROTOCOL_REGISTER14_1               87 
#define         PROTOCOL_REGISTER8_1                88 

#define         DATA_PATH_2                         96
#define         PROTOCOL_REGISTER1_2                97
#define         PROTOCOL_REGISTER2_2                98
#define         PROTOCOL_REGISTER3_2                99
#define         CLOCK_SPEED_LSB_2                   100
#define         CLOCK_SPEED_MSB_2                   101
#define         PROTOCOL_REGISTER4_2                102
#define         PROTOCOL_REGISTER5_2                103
#define         FIFO_CONTROL_2                      104
#define         PROTOCOL_REGISTER6_2                105
#define         PROTOCOL_REGISTER7_2                106
#define         INTERRUPT_CONTROL_2                 107
#define         DMA_LINE_CONTROL_2                  108
#define 		TRANSFER_SIZE_CONTROL_2             109
#define         CONDITION_DELAY_2                   110
#define         DAQ_OPTIONS_2           		    111
#define         PATTERN_DETECTION_2                 113
#define         PROTOCOL_REGISTER9_2   				114
#define         PROTOCOL_REGISTER10_2               115
#define         PROTOCOL_REGISTER11_2               116
#define         PROTOCOL_REGISTER12_2               117
#define         PROTOCOL_REGISTER13_2               118 
#define         PROTOCOL_REGISTER14_2               119 
#define         PROTOCOL_REGISTER8_2                120
#define         RTSI_SERIAL_REG                     124
#define         RTSI_PARALLEL_REG                   126
 
/* Read-only registers */
#define         INTERRUPT_AND_WINDOW_STATUS         4
#define         GROUP_STATUS                        5  
#define         GROUP1_FLAGS                        6
#define         GROUP2_FLAGS                        7
#define 		FIFO_STATUS                         20